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Niels Bohr

Intel Demos Single Chip with 48 Cores

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That's an experimental lab system with no practical function (yet).

Here's what turns my crank: it's a working 'algorithmic trader in a box' :

a single 32 core Nehalem system with LDMA feed handlers connected to the full suite of US equities and options exchanges (CTA/UTP/OPRA), market access gateways, and 8 cores to spare for running trading algos.

http://exchanges.nyse.com/archives/2009/09/nirvana.php

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Filed: Citizen (pnd) Country: Cambodia
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I didn't see this. Algorithmic Trader in a box? So, is this the holy grail of richness?

That's an experimental lab system with no practical function (yet).

Here's what turns my crank: it's a working 'algorithmic trader in a box' :

a single 32 core Nehalem system with LDMA feed handlers connected to the full suite of US equities and options exchanges (CTA/UTP/OPRA), market access gateways, and 8 cores to spare for running trading algos.

http://exchanges.nyse.com/archives/2009/09/nirvana.php

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Filed: Citizen (apr) Country: Colombia
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Wasn't Windows 3.1 a 32 bit OS? Well you required WinS32 to run 32 bit systems, was pretty good because those applications would run twice as fast. Isn't Vista still a 32 bit system even though the processors are well in excess of 128 bits. Did read that people that purchased Vista64 ran into problems with the current 32 bit applications, so didn't want to fool with it.

When all this software stuff started, was suppose to be easy and cheap to write software using common hardware that was very difficult to change, but the hardware is far advanced of the software. Not only that, but far more expensive than the hardware today. Have thousands of dollars worth of software on a computer I got less for than a thousand bucks, but always had been that way with the introduction of PC's. Ha, get a Mac, not even supported by most software companies, and what is available is far more expensive. But guess a Mac is okay with just the OS and doing nothing else than playing on the web. Not even worth the effort to develop all those virus's and worms for a Mac.

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Filed: Citizen (pnd) Country: Cambodia
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64 bits was to improve the problem of memory management with 32 bits. Adding more bits to the processor will cause problems in terms of gate delays. For example, if we have 64-bit adders, when we try to add numbers, it is slower than a 32 bit processor. The reason is the propagation of the carry that is generated. A whole slew of research has been done to improve the speed of addition in microprocessors.

Also, 64 bits requires more room in storage as well. If you're running 32 bit application, the OS will extend the 32 bit code by appending additional 32 bits of zeros. So, 32 bit on a 64 bit is sort of a waste of space.

However, having 64 bits alleviate the memory bottleneck. The OS can better manage paging, and segmenting of virtual memory. Not only that, it provides more capabilities compared to 32 bit. I can list a few more, but, it's too early.

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Filed: Citizen (apr) Country: Colombia
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Really don't know your background on computer design, but with the high distributed capacitance and inductance or wiring using very slow discrete components and even vacuum tubes, parallel processing was the only way to go and is also the basis of the so-called supercomputer design.

Early IC processors had separate instruction and data buses that were combined into a single data bus, this was done for two reasons, using standard IC packaging and to save a couple of cents per added pin to keep marketing happy. Also like to save a few cents using a two rather than a four digit year, really pushed by marketing to save a few cents on computers that were selling for several thousands of dollars at the time. That price never was recuperated during 2KY.

The big disadvantage of the combined data/instruction bus is that while data can be any number of bytes long, instructions are generally 1-3 bytes long, this just doesn't work. Our computers would be far more reliable today if those buses were separated like they were when all this stuff first started.

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Filed: Citizen (pnd) Country: Cambodia
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The parasitics are just one component that is part of the propogation delay. With And gates being slower than NAND, or Nor being slower than NAND. NAND using less FETS compared to AND gates.

Wiring is not really an issue in IC because the gate that connects with the FETs. These wires that are linked to the FETs are made of polycrystalline silicone. The bus outside the chip contributes to different delays which can cause serious clock skews, etc...which would affect the perfomance of the CPU. Clock skew also must be handled seperately before they lay down the die.

On the other hand, the larger the transistor count per area, the larger the parasitics. And, also, the larger the bits, the larger the number of full adders are needed in the ALU. Thereby contributing to the larger delays in adding number. They kind of reduced the amount of hardware in the ALU by using techniques as the radix 4 or radix 8 booth encoding method. Technically, the point is to reduce hardware and increase addition speed.

However, the older Intel platform uses an external memory controller that would require the CPU to access the TLB (C.A.M. in hardware term, content addressable memory) hardware to have access to physical memory addresses. This is why they are slower than the AMD since AMD integrated the memory controller on their chip.

There's so many more problems with gate delays, parasitics, clock skew, area, fabrication that needs to be looked at in terms of actual delay because we're dealing with so small hardware, and so many paths and layers of substrate.

Really don't know your background on computer design, but with the high distributed capacitance and inductance or wiring using very slow discrete components and even vacuum tubes, parallel processing was the only way to go and is also the basis of the so-called supercomputer design.

Early IC processors had separate instruction and data buses that were combined into a single data bus, this was done for two reasons, using standard IC packaging and to save a couple of cents per added pin to keep marketing happy. Also like to save a few cents using a two rather than a four digit year, really pushed by marketing to save a few cents on computers that were selling for several thousands of dollars at the time. That price never was recuperated during 2KY.

The big disadvantage of the combined data/instruction bus is that while data can be any number of bytes long, instructions are generally 1-3 bytes long, this just doesn't work. Our computers would be far more reliable today if those buses were separated like they were when all this stuff first started.

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Filed: Citizen (pnd) Country: Cambodia
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ya but can it play Crysis???

Possibly. Right now, the density of GPU is larger than CPUs in terms of transistor counts. And, their architecture are alot differently. It's not designed for multi-tasking. However, if you have multiple GPU as in SLI or Crossfire configuration you may have that option by making one GPU work on one process, and another on a different process.

Nvidia is pushing the use of Cg for multiprogramming capabilities on their new nVidia GPUs. Don't know about ATI (now AMD).

And, people in the graphics industry are currently doing research in ray tracing methods to draw graphics instead of rasterization. Supposedly ray tracing is quicker at drawing geomtries, and requires less hardware which would translate into better graphics and cheaper. We'll see. It's a very rapid pace industry

This is not to take into consideration that finFETs are be used as oppose to a typical pFET or nFET type of transistors. finFETs uses a 3-D architecture as oppose to the 2-D arrangements from pFET and nFET. finFET can increase the speed of the transistor.

Adding this together, the future will be many 100x better than today.

Edited by Niels Bohr

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64 bits was to improve the problem of memory management with 32 bits. Adding more bits to the processor will cause problems in terms of gate delays. For example, if we have 64-bit adders, when we try to add numbers, it is slower than a 32 bit processor. The reason is the propagation of the carry that is generated. A whole slew of research has been done to improve the speed of addition in microprocessors.

Also, 64 bits requires more room in storage as well. If you're running 32 bit application, the OS will extend the 32 bit code by appending additional 32 bits of zeros. So, 32 bit on a 64 bit is sort of a waste of space.

However, having 64 bits alleviate the memory bottleneck. The OS can better manage paging, and segmenting of virtual memory. Not only that, it provides more capabilities compared to 32 bit. I can list a few more, but, it's too early.

64-bit systems are great - you can memory-map a giant data file and analyze away...

Unless of course you need a DWCAS instruction (e.g. for lockless multi-producer multi-consumer

queues) which would require 128 bits on a 64-bit system, and then you're SOL.

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Here's what turns my crank: it's a working 'algorithmic trader in a box' :

a single 32 core Nehalem system with LDMA feed handlers connected to the full suite of US equities and options exchanges (CTA/UTP/OPRA), market access gateways, and 8 cores to spare for running trading algos.

Have you seen this?

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Filed: Citizen (pnd) Country: Cambodia
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Looks like this is all new to me. I never did any projects related to trading. Didn't know there something like DWCAS. MaWilson, you're such a trading enthusiast no wonder you're loaded.

I'm going to follow up on the trading machines. Maybe I can become like MaWilson. :D

Edited by Niels Bohr

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Looks like this is all new to me. I never did any projects related to trading. Didn't know there something like DWCAS.

You can start here. With the steady growth of multi-core systems, lock-free algorithms that can scale

with the availability of new cores are becoming increasingly more important.

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